XPC8260ZUIHBC

480-TBGA, PowerQUICC II Integrated Communications Processor, Dual-issue integer core, -0.3V to 2.75V

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Price:: US $55.20~56.00 / piece [Get Latest Price]

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	US $55.20~56.00

PartNumber:: XPC8260ZUIHBC

Brand:: Freescale Semiconductor, Inc - Freescale | Pack: BGA | D/C: 09+

Availability:: Supply Ability: 10000/Week Can Ship Immediately
Delivery: 10-15 Business Days (ships out within 3 Business days)

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Total Price:: US $0

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Products Upload time: 2011-12-07

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Part Number:XPC8260ZUIHBC
US $55.20 - 56.00
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Product Summary

The XPC8260ZUIHBC is a PowerQUICC II Integrated Communications Processor. It contains circuitry protecting against damage due to high static voltage or electrical fields; however, the XPC8260ZUIHBC is advised that normal precautions be taken to avoid application of any voltages higher than maximum-rated voltages to this high-impedance circuit.

Parametrics

XPC8260ZUIHBC absolute maximum ratings: (1)Core supply voltage:-0.3 to 2.75 V; (2)PLL supply voltage:-0.3 to 2.75 V; (3)I/O supply voltage:-0.3 to 4.0 V; (4)Input voltage:GND(-0.3) to 3.6 V; (5)Junction temperature:120℃; (6)Storage temperature range:(-55) to (+150)℃.

Features

XPC8260ZUIHBC features: (1)Supports two groups of four TDM channels for a total of eight TDMs; (2)2,048 bytes of SI RAM; (3)Bit or byte resolution; (4)Independent transmit and receive routing, frame synchronization; (5)Microwire compatible ; (6)Multiple-master, single-master, and slave modes; (7)Provide management for BRI devices as general circuit interface(GCI) controllers in time-division-multiplexed (TDM) channels; (8)Transparent; (9)UART (low-speed operation); (10)Ethernet/IEEE 802.3 CDMA/CS ; (11)HDLC/SDLC and HDLC bus; (12)Universal asynchronous receiver transmitter (UART); (13)Synchronous UART; (14)Binary synchronous (BISYNC) communications; (15)Transparent; (16)Interfaces to G2 core through on-chip 24-Kbyte dual-port RAM and DMA controller; (17)Serial DMA channels for receive and transmit on all serial channels; (18)Parallel I/O registers with open-drain and interrupt capability; (19)Virtual DMA functionality executing memory-to-memory and memory-to-I/O transfers.